DFT on HJ4IThttps://hj4.it/tags/dft/Recent content in DFT on HJ4ITHugoen[© CC BY 4.0](https://creativecommons.org/licenses/by/4.0/legalcode)Mon, 01 Jul 2024 21:20:00 +0900[NPU Design Journey] Shared Memory Design and Technical Challenges for Capacity-to-Area Optimizationhttps://hj4.it/posts/rbln-chip-bist/Mon, 01 Jul 2024 21:20:00 +0900https://hj4.it/posts/rbln-chip-bist/This post details how optimizing NPU Shared Memory with a Shared Bus interface for MBIST logic reduced Mux count by 48%, resolved timing bottlenecks, and maximized SRAM density.